1. Technical Field
The present invention relates generally to integrated circuits, and more particularly, to integrated circuits having a plurality of register configuration sets.
2. Related Art
Many integrated circuits (ICs) offer the user ways of configuring the function of the chip. There are several techniques available to do this, but for medium-to high-complexity devices, one of the most common techniques uses on-chip registers to store specific setting values which program specific characteristics. For example, in a hard disk drive (HDD) read channel, 01x in register D4x might mean, set the internal filter 3 dB frequency to 218.5 MHz. Alternatively, in a microprocessor, a value of 01x in register D4x might mean, turn off the instruction prefetch in low power mode.
The number of programmable registers is determined by the number of bits used for addressing the register space. For example, if 8 bits are permitted for addressing, there can be 256 individually addressable registers. The size of each register can be arbitrarily set. For example, referring to FIG. 1, parts of a typical HDD read channel IC 10 are shown. A typical HDD read channel, uses 8 bit registers at each address. Accordingly, there are 8×256=2048 individually adjustable register bits. These registers 12 are indicated as 00 to FF in register memory 11. The registers 12 are often implemented as latches and placed along with the rest of the functional logic using application specific IC (ASIC) standard cell library elements. Because the contents of the registers are used during normal operation of the chip—particularly to control sensitive continuous time analog circuits—the values of all registers must be available on dedicated wire buses at all times.
With continuing reference to FIG. 1, the setting values stored in the registers can come from a number of places. First, the latches in the registers are designed to reliably reset to a specific state when power is first applied to IC 10. For example, 0 or 1, depending on the reset condition desired for the circuit being controlled by that register. Because these values are designed in for each bit in each register, there is, in some sense, a memory 14 to contain this power-on reset (POR) value information. Second, once the chip is powered up and operating normally, the setting values in the registers can be set from an external source of configuration data 30 via primary pins on the IC, often in a serial fashion via a serial access port 16 to reduce the number of pins required. A typical serial port transaction would use one pin (ENA) to signal enable; another pin (DATA) to signal information in the form of na bits of address, na bits of data, and 1 bit of direction (read or write); and a third pin (CLK) to act as a strobe or clock. Third, register setting values can also be generated by internal engines on IC 10. For example, as shown in FIG. 1, some ICs include an internal calibration engine 18 for analog circuits and/or an internal hardware optimization engine 20.
In some applications, the register configuration settings must be changed frequently because the conditions of the application change. One exemplary application where this occurs is hard disk drives. In this example, the HDD read channel IC must be reconfigured by the hard disk controller (HDC), i.e., the external source 30, every time the HDD head is moved from zone to zone on the disk. Sets of register configuration settings are normally stored with the HDC, which initializes them from the disk when the system is powered on. However, the HDC and the read channel are normally not integrated on the same chip. Accordingly, each and every register load necessitates a serial port transaction. Consequently, modifying register settings takes time and energy, and reduces overall system performance. Furthermore, functions for modifying register settings must be written into the higher level system control program (i.e., microcode or firmware) in the application system, e.g., the HDC, which increases the size and complexity of the code.
In view of the foregoing, there is a need in the art for a less complex, quicker and more efficient way to reconfigure an integrated circuit.